In recent years, there is being progressed development of a monolithic structure of a gate driver (a scanning signal line drive circuit) that drives a gate bus line (a scanning signal line), in a liquid crystal display device. Conventionally, a gate driver is often mounted on a peripheral part of a substrate that constitutes a liquid crystal panel, as an IC (Integrated Circuit) chip. However, in recent years, direct formation of a gate driver on a substrate is gradually increased. Such a gate driver is called a “monolithic gate driver”, for example. In a liquid crystal display device that includes a monolithic gate driver, a thin-film transistor that uses amorphous silicon (a-Si) (hereinafter, referred to as an “a-SiTFT”) is conventionally employed as a drive element. However, in recent years, a thin-film transistor that uses microcrystalline silicon (μc-Si) (hereinafter, referred to as a “μc-SiTFT”) is being tentatively employed. Mobility of microcrystalline silicon is larger than mobility of amorphous silicon, and further, a μc-SiTFT is formed by a process similar to that of an a-SiTFT. Therefore, based on employment of the μc-SiTFT for a drive element, it is expected to achieve cost reduction through reduction of a picture-frame area and reduction of the number of chips of a driver IC, improvement of packaging yield, an increase in a size of a display device, and the like.
A display unit of an active matrix-type liquid crystal display device includes a plurality of source bus lines (video signal lines), a plurality of gate bus lines, and a plurality of pixel formation portions that are provided at respective intersections of the plurality of source bus lines and the plurality of gate bus lines. The pixel formation portions constitute a pixel array by being arranged in a matrix shape. Each pixel formation portion includes a thin-film transistor which is a switching element having a gate terminal connected to a gate bus line passing through a corresponding intersection and having a source terminal connected to a source bus line passing through the intersection, and includes a pixel capacitance for holding a pixel voltage value. Further, the active matrix-type liquid crystal display device is provided with the gate driver, and a source driver (a video signal line drive circuit) for driving the source bus line.
A video signal that indicates a pixel voltage value is transmitted by source bus lines, but each source bus line cannot temporarily (simultaneously) transmit a video signal that indicates pixel voltage values of a plurality of rows. Therefore, writing (charge) of video signals into pixel capacitances in the pixel formation portions that are arranged in a matrix shape is sequentially performed row by row. Hence, a gate driver is configured by a shift register that includes a plurality of stages, such that a plurality of gate bus lines are sequentially selected during each predetermined period. Each stage of the shift register is a bistable circuit that is in either one of two states (a first state and a second state) at each time point and that outputs a signal indicating this state (hereinafter, referred to as a “state signal”) as a scanning signal. Active scanning signals are sequentially outputted from a plurality of bistable circuits in the shift register, thereby writing of video signals into the pixel capacitances is sequentially performed row by row, as described above.
Relating to the present invention, the following prior arts are known. Japanese Patent Application Laid-Open Publication No. 2005-94335 discloses a configuration for suppressing a variation of a threshold characteristic of a transistor, concerning a shift register that is provided in an electronic device such as an image reading device. Japanese Patent Application Laid-Open Publication No. 2003-16794 discloses a configuration for preventing a malfunction of a transistor attributable to a parasitic capacitance of the transistor, concerning a shift register that is provided in an electronic device. Japanese Patent Application Laid-Open Publication No. 2006-106394 discloses a configuration for operating two gate drivers by using a multiphase clock, concerning a liquid crystal display device. Japanese Patent Application Laid-Open Publication No. 2006-107692 discloses a configuration for preventing a malfunction attributable to a variation of a threshold voltage of a transistor, concerning a shift register that is provided in a display panel. Japanese Patent Application Laid-Open Publication No. 2006-127630 discloses a configuration for operating a shift register by using a plurality of clocks, concerning a shift register that is used in a liquid crystal display device. Japanese Patent Application Laid-Open Publication No. 2001-52494 discloses a configuration for preventing attenuation of a level of an output signal and a variation of a threshold voltage characteristic of a transistor, concerning a shift register that is provided in an electronic device.